Open Conference Systems, 1st International Youth Conference on Engineering Innovation

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Implementation of 8085 Microprocessor Arithmetic Logic Unit in Field Programmable Gate Array (FPGA) Using Vedic Mathematics
Rizky Aiman Haniffalah Harijanto

Last modified: 2021-11-22


Abstract. The Arithmetic Logic Unit (ALU) is an important part of the microprocessor that performs arithmetic and logic instructions. The performance of the microprocessor heavily depends on the performance of the ALU. In this paper, ALU is designed using vedas mathematical concepts to optimize design complexity and speed in arithmetic units, namely the Urdhva-tiryagbhyam Sutra and the Nikhilam Sutra. The proposed project is coded in Very High-Speed Integrated Circuit Hardware Description Language (VHDL), followed by synthesization using EDA tool, Xilinx ISE Design Suite 14.7,  and implemented in Spartan-3E FPGA. The results of the proposed project will be compared with other methods to determine the effectiveness of the use of the vedas mathematical method.


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